1. Technical Field
The present invention generally relates to a semiconductor memory device and an operating method thereof and, more particularly, to a semiconductor memory device including non-volatile memory cells and an operating method thereof.
2. Related Art
Semiconductor memory devices have varying operating characteristics although they are fabricated under the same condition. For this reason, after semiconductor memory devices are fabricated, a test operation is performed in order to check operating characteristics of the semiconductor memory devices. Operating voltages of the semiconductor memory devices are determined based on the checked operating characteristics. Furthermore, the address of a failed memory cell or a failed memory block is checked through the test operation.
This information (hereinafter referred to as ‘operation setting information’) is stored in a non-volatile memory block, such as a Code Address Memory (hereinafter referred to as a ‘CAM) block or an extra block. When power starts are supplied to the semiconductor memory device, a CAM read operation for reading the operation setting information stored in the CAM block is first performed. Next, an operating voltage having a preset level is generated based on operation setting information that is read from the CAM, and all operations are controlled so that a failed memory block is not used.
The operation setting information is stored in the CAM block through a program operation. The threshold voltages of CAM cells included in the CAM block vary depending on a data value of the operation setting information. In order to increase the data storage capacity, 2 bits of data are stored in each memory cell for storing data. For improved operational stability and reliable operation setting information, 1 bit of data is stored in each of the CAM cells. That is, the CAM cells may be divided into CAM cells of an erase state in which the threshold voltage is lower than 0 V and CAM cells of a program state in which the threshold voltage is higher than 0 V depending on a data value of the operation setting information. Furthermore, in a CAM read operation, a read voltage which is higher than the threshold voltages of the CAM cells of the erase state, but lower than the threshold voltages of the CAM cells of the program state is supplied to selected CAM cells. On the other hand, a pass voltage for turning on unselected CAM cells may be supplied to the unselected CAM cells regardless of their threshold voltages.
In order to perform a CAM read operation whenever power is supplied to the semiconductor memory device, the read voltage and the pass voltage are supplied to the CAM cells. Accordingly, the threshold voltage of the CAM cell is shifted by an interference phenomenon. That is, the threshold voltage of the CAM cell of the erase state is increased, but the threshold voltage of the CAM cell of the program state is lowered. If the threshold voltage of the CAM cell is greatly shifted as described above, the threshold voltage of the CAM cell of the erase state may become higher than the read voltage or the threshold voltage of the CAM cell of the program state may become lower than the read voltage, resulting in an error.